The invention is related to amplifier circuits having variable offset capability, and applications of such circuits.
Amplifier circuits are used to amplify an input electrical signal to provide current or voltage gains or reductions. They may be used to amplify a single ended or a differential signal. In addition, when used in conjunction with an output regenerative latch stage, they can provide a digital output signal (having one of two stable states) that is an indication of a comparison between two single ended input signals or a determination of the magnitude of a differential signal. A basic component of many amplifier circuits is the differential transistor pair used as the input stage of the amplifier.
Most practical implementations of amplifier circuits suffer from manufacturing process-induced variations in the structure of the circuit devices, which cause an offset in the amplifier""s operation. The offset may be explained by, for instance, considering an amplifier that is designed to amplify a differential input signal. In some applications, the output of the amplifier would ideally be zero volts if the input differential signal was zero volts. However, in practice, a zero voltage differential signal often yields a small but nevertheless non-negligible output offset voltage. Output offset may be corrected using a wide range of techniques known as offset cancellation techniques. In one such technique, the value of the input differential signal that actually yields a zero output voltage is measured and stored, and then is subsequently subtracted from each new input signal to thus cancel the offset of the amplifier. In other applications of amplifier circuits, such as a pre-amplifier circuit in a comparator circuit, the amplifier circuit is designed to have a specified offset so that a comparison is indicated only when the offset is overcome.
The trend in circuit design is toward smaller and smaller device sizes, which serves not only to minimize space consumption, but also to minimize the capacitance and hence maximize the speed of circuits that incorporate the devices. However, with smaller device sizes, process-induced variations become more of an issue because the probability for process-induced variation in the structure of a device becomes greater as device size becomes smaller.